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For instance, an update to Actel's Project Manager allows users to build and test revisions to their design by saving multiple trial implementations. Multiple ease-of-use features enhance Libero's highly intuitive IDE. Further, Libero 6.0 includes an enhanced version of Mentor Graphics' ModelSim HDL simulation environment. With Verilog Change Dump (VCD) import, WaveFormer Lite enables the import of IEEE 1364 standard waveforms. SynaptiCad's WaveFormer Lite 9.6 has also been upgraded to support a reactive test bench, which compares test bench models against actual output results, greatly simplifying analysis of simulation timing results. Magma's PALACE is fully compatible with any synthesis tool, including Synplicity's Synplify and Synplify Pro tools, further contributing to its seamless operation within Libero 6.0.
#Synplify pro batch mode software
"Synplicity's intuitive, easy-to-use technologies, such as MultiPoint and HDL Analyst, and our industry-leading quality of results combined with the Libero IDE provides an Actel-optimized solution that can enable faster timing closure and fewer costly design iterations for all Actel customers."īridging synthesis and place-and-route to improve timing and performance for Actel's flash-based ProASIC Plus devices, Magma's PALACE software is now bundled with Libero Platinum 6.0 and can be summoned directly from the Libero 6.0 interface. "Like Actel, Synplicity is committed to improving designer productivity," said Jeff Garrison, Synplicity's director of marketing for FPGA products. Other performance enhancement features such as re-timing/register balancing are also available in the Synplify Pro software.
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Also included in the Synplify Pro software is Synplicity's HDL Analyst® tool that automatically generates an RTL graphical view and post-map schematic view of the design for fast code analysis and debug. The technology creates interface logic models (ILMs) based upon user-defined compile points, allowing parts of a design to remain unchanged while others are synthesized, resulting in better quality of timing and area results, faster runtime and the advanced handling of large designs. In addition, Actel Libero Silver and Gold users now have access to other features not previously enjoyed, such as the Hierarchical Netlist Browser, batch or command line mode (for floating licenses), and interface to the HDL Analyst.Ĭhoosing the Synplify Pro AE software as an add-on to Libero 6.0, users can incrementally design Actel FPGAs using Synplicity's MultiPoint™ technology.
#Synplify pro batch mode for free
Now available for free with all versions of Libero 6.0, Synplicity's Synplify AE software includes Synplicity's SCOPE Editor, which allows users to add timing and other constraints through a GUI. Seamless Integration of Best-in-Class Tools The design environment also boasts new ease-of-use improvements and additional updates to other industry-leading third-party tools.
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In addition, users can access a full version of Magma Design Automation's PALACE (Physical and Logical Automatic Compilation Engine) physical synthesis tool directly from the Libero 6.0 interface. By joining forces with these companies, Actel is able to leverage this superior technology and offer customers the best mix of design tools the industry has to offer."Īlso, for the first time, Libero customers may purchase Synplicity's high-end synthesis tool, Synplify Pro® AE, directly from Actel at a significant cost savings. "As FPGAs continue to push the envelope in terms of performance, we recognize that third-party software companies like Synplicity and Magma Design Automation possess the expertise to provide top-notch front-end design tools.
"Actel's latest Libero IDE stands as a testament to the company's commitment to building strong relationships with cutting-edge EDA tool vendors," said Saloni Howard-Sarin, tools marketing director at Actel. Providing enhanced functionality and performance, all editions of Libero 6.0, including its free Silver edition, now include Synplify® Actel Edition (AE) software, Synplicity's industry-leading synthesis tool specially optimized for Actel's flash- and antifuse-based FPGAs. The streamlined IDE seamlessly integrates the industry's best third-party design tools and delivers unprecedented flexibility and efficiency for today's complex, time-sensitive field-programmable gate array (FPGA) designs. MOUNTAIN VIEW, Calif., JActel Corporation (NASDAQ: ACTL) today introduced its most flexible and comprehensive tool suite to date, the Libero Integrated Design Environment (IDE) version 6.0. In Company's Highest Performing Tool Suite Offered to Date, Synplicity's Synplify AE Software Now Included for Free Magma's Physical Synthesis for PLDs Seamlessly Integrated
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